The present invention relates to a data processor for executing an exception handling program to cope with the occurrence of exceptions such as reset event, exception events and interrupt events. More specifically, the invention relates to technology for shortening the time required for the transition from a moment of occurrence of an exception event to the operation of an exception handler for coping with the exception event. The invention relates to technology that can be effectively adapted to, for example, a single-chip microcomputer or a microprocessor contained in a memory management unit (MMU).
In processing the data using a central processing unit that is included in the data processor, there may often occur general exception events such as decoding of undefined instruction in an instruction set of the data processor, invalid arithmetic operation, protection violation in a virtual storage, TLB miss exception events, etc., as well as end signaling for informing the central processing unit of the end of of the data processor and interrupt requests (referred to as general interrupt events) such as request of reception from a communication module in the data processor.
When exception events such as the above-mentioned general exception events and general interrupt events occur, the central processing unit suspends the execution of instructions of a data processing program, shifts the control to an exception handler to cope with exceptions that have occurred, executes the data processing specified by the exception handler, and works to cope with the exception events. After the exception handler is executed, the central processing unit retries the suspended instruction or returns to an instruction address next to the suspended instruction, and resumes the suspended data processing program. Therefore, if general exception events and general interrupt events occur, the central processing unit executes the operation to save values of a program counter therein and internal conditions of the status register into the stack regions of an external memory. When the processing of the central processing unit returns from the exception handler to the suspended data processing program, the central processing unit transfers the values saved in the program counter and the internal conditions of the status register from the stack regions of the external memory to the program counter and to the status register, respectively, and continues the suspended data processing program.
A predetermined data processing program has been branched to a predetermined exception handler by a method of fixing a variety of destination addresses (head memory addresses of a variety of exception handlers) using a hardware (logic circuit) or by a vector system which designates destination addresses from the central processing unit. According to the vector system, for example, a vector table storing head addresses of a variety of exception handlers for responding to an interrupt request is arranged on an external memory, a pointer (interrupt vector register) of the vector table is designated from the central processing unit, the head address of a corresponding exception handler is read out from the designated vector table, and a desired exception handler is read out from a position of the head address that is read out and is executed.
As a literature describing exception events such as interrupt requests, there can be cited "MICROCOMPUTER HANDBOOK", Ohm Co., Dec. 25, 1987, pp. 177-178.